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USB
Table 36. USB general timing parameters
Parameter
USB clock cycle time
Input setup to USB clock—all inputs
input hold to USB clock—all inputs
USB clock to output valid—all outputs (except
Symbol 1
t USCK
t USIVKH
t USIXKH
t USKHOV
Min
15
4
1
—
Max
—
—
—
7
Unit
ns
ns
ns
ns
Note
—
—
—
—
USBDR_STP_USBDR_STP)
USB clock to output valid—USBDR_STP
Output hold from USB clock—all outputs
t USKHOV
t USKHOX
—
2
7.5
—
ns
ns
—
—
Note :
1. The symbols used for timing specifications follow the pattern of t (first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t (first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, t USIXKH symbolizes USB timing
(USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, t USKHOX
symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
The following figures provide the AC test load and signals for the USB, respectively.
Output
Z 0 = 50 Ω
R L = 50 Ω
OV DD /2
Figure 28. USB AC test load
USBDR_CLK
Input Signals
t USIVKH
t USIXKH
t USKHOV
t USKHOX
Output Signals
Figure 29. USB signals
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
Freescale Semiconductor
37
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